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Training: Digital IC Physical Design, General Registration

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Training: Digital IC Physical Design, General Registration

This back-end digital IC design course focuses on the physical implementation flow used in ASIC development.

Date: September to October 2026
Location: Online

$3,000.00

Training: RTL, Synthesis & Verification, General Registration

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Training: RTL, Synthesis & Verification, General Registration

Front-end digital design training in RTL coding, simulation, synthesis, and verification workflows using professional semiconductor EDA tools.

Date: September to October 2026
Location: Online

$3,000.00

Training: High-Speed SerDes Design, General Registration

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Training: High-Speed SerDes Design, General Registration

Advanced transistor-level training in serial interface design: TX/RX circuits, equalization (FFE, CTLE, DFE), clock recovery, and signal integrity for >200 Gbps links.

Date: September to October 2026
Location: Online

$3,000.00