Prepared by Mike Bichan, Department of Electrical and Computer Engineering, University of Toronto, in co-operation with CMC Microsystems.
This document provides advice on using Layout Versus Schematic (LVS) flow and the ST Microelectronics 65nm design kit.
All CMC Microsystem account holders with a Professor Research Subscription are authorized to access this application note. For more information contact Linda Dougherty at licensing@cmc.ca or 613-530-4787.
