Prepared by Moufid Radji, Master of Engineering Candidate, McGill University, under co-supervision of Ricardo Izquierdo (UQÀM) and Anas A. Hamoui (McGill), and the DreamWafer® Research Team.
This application note outlines key steps to add a Through Silicon Via (TSV) and extra metal layers to a Complementary Metal Oxide Semiconductor (CMOS) wafer. This TSV process is described in relation to the fabrication of 200 mm Development Wafers for a WaferBoardTM product which is used for rapid system prototyping.
All CMC Microsystem account holders with a Professor Research Subscription are authorized to access this application note. For more information contact Linda Dougherty at licensing@cmc.ca or 613-530-4787.
